STR720 datasheet(246/401 Pages) STMICROELECTRONICS

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STR720 - CONTROLLER AREA NETWORK (CAN)

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By means of a Remote Frame, the CPU may request another CAN node to provide new data

for a receive object. Setting the TxRqst bit of a receive object will cause the transmission of a

Remote Frame with the receive object’s identifier. This Remote Frame triggers the other CAN

node to start the transmission of the matching Data Frame. If the matching Data Frame is

received before the Remote Frame could be transmitted, the TxRqst bit is automatically reset.

18.7.7

Configuring a FIFO Buffer

With the exception of the EoB bit, the configuration of Receive Objects belonging to a FIFO

Buffer is the same as the configuration of a (single) Receive Object, see Section 18.7.5:

Configuring a Receive Object on page 245.

To concatenate two or more Message Objects into a FIFO Buffer, the identifiers and masks (if

used) of these Message Objects have to be programmed to matching values. Due to the

implicit priority of the Message Objects, the Message Object with the lowest number will be

the first Message Object of the FIFO Buffer. The EoB bit of all Message Objects of a FIFO

Buffer except the last have to be programmed to zero. The EoB bits of the last Message

Object of a FIFO Buffer is set to one, configuring it as the End of the Block.

18.7.8

Receiving Messages with FIFO Buffers

Received messages with identifiers matching to a FIFO Buffer are stored in a Message Object

of this FIFO Buffer starting with the Message Object with the lowest message number.

When a message is stored in a Message Object of a FIFO Buffer, the NewDat bit of this

Message Object is set. By setting NewDat while EoB is zero, the Message Object is locked for

further write access by the Message Handler until the application software has written the

NewDat bit back to zero.

Messages are stored into a FIFO Buffer until the last Message Object of this FIFO Buffer is

reached. If none of the preceding Message Objects is released by writing NewDat to zero, all

further messages for this FIFO Buffer will be written into the last Message Object of the FIFO

Buffer and therefore overwrite previous messages.

18.7.8.1 Reading from a FIFO Buffer

When the CPU transfers the contents of a Message Object to the IFn Message Buffer register

by writing its number to the IFn Command Request Register, the corresponding Command

Mask Register should be programmed in such a way that bits NewDat and IntPnd are reset to

zero (TxRqst/NewDat = ‘1’ and ClrIntPnd = ‘1’). The values of these bits in the Message

Control Register always reflect the status before resetting the bits.

To assure the correct function of a FIFO Buffer, the CPU should read the Message Objects

starting at the FIFO Object with the lowest message number.

Figure 34 shows how a set of Message Objects which are concatenated to a FIFO Buffer can

be handled by the CPU.

STR720 Datasheet(PDF) 246 Page - STMicroelectronics