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STR720 Datasheet(PDF) 344 Page - STMicroelectronics |
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STR720 Datasheet(HTML) 344 Page - STMicroelectronics |
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344 / 401 page ![]() STR720 - GENERAL PURPOSE I/O PORTS 344/401 The Figure 62 on page 344 shows the basic structure of the General Purpose IO Port bit. Table 72. Port Bit Configuration Table (*) refer to the device electrical characteristics The configuration PC0(n)-PC1(n)-PC2(n)=000 is Reserved and the user should not use it. In this config- uration the correspondent pin enters the High Impedance state. The configuration PC0(n)PC1(n)PC2(n)=100 and 010 configure the correspondent pin in the same state: Input, Tristate, CMOS. Figure 62. Basic Structure of an I/O Port Bit PC0(n) 01 010 10 1 PC1(n) 00 110 01 1 PC2(n) 00 001 11 1 P(n) Configuration RE- SERV ED IN INOUT OUT OUT AF AF P(n) Output TRI TRI WP OD PP OD PP P(n) Input - CMOS CMOS CMOS CMOS CMOS CMOS Notes: Hi: High impedance OD: Open Drain AIN: Analog Input PP: Push-Pull IN: Input WP: Weak Push-Pull OU: Output TRI: Tristate INOUT: Bidirectional CMOS: CMOS Standard Input(*) AF: Alternate Function I/O PIN Alternate Function (OUT) Alternate Function (IN) Push-Pull Tristate Open Drain Weak Push-Pull CMOS |
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