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STM32H745II Datasheet(PDF) 183 Page - STMicroelectronics

No. de pieza STM32H745II
Descripción Electrónicos  Dual 32-bit Arm® Cortex®-M7 up to 480MHz and -M4 MCUs,up to 2MB Flash, 1MB RAM, 46 com. and analog interfaces, SMPS
PDF  252 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H745II Datasheet(HTML) 183 Page - STMicroelectronics

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DS12923 Rev 1
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STM32H745xI/G
Electrical characteristics
228
Figure 40. Quad-SPI timing diagram - SDR mode
Figure 41. Quad-SPI timing diagram - DDR mode
6.3.20
Delay block (DLYB) characteristics
Unless otherwise specified, the parameters given in Table 95 for Delay Block are derived
from tests performed under the ambient temperature, frcc_c_ck frequency and VDD supply
voltage summarized in Table 23: General operating conditions, with the following
configuration:
MSv36878V1
Data output
D0
D1
D2
Clock
Data input
D0
D1
D2
t(CK)
tw(CKH)
tw(CKL)
tr(CK)
tf(CK)
ts(IN)
th(IN)
tv(OUT)
th(OUT)
MSv36879V1
Data output
D0
D2
D4
Clock
Data input
D0
D2
D4
t(CK)
tw(CKH)
tw(CKL)
tr(CK)
tf(CK)
tsf(IN) thf(IN)
tvf(OUT)
thr(OUT)
D1
D3
D5
D1
D3
D5
tvr(OUT)
thf(OUT)
tsr(IN) thr(IN)
Table 95. Delay Block characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tinit
Initial delay
-
1400
2200
2400
ps
t∆
Unit Delay
-
35
40
45
-



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