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STM32H745II Datasheet(PDF) 191 Page - STMicroelectronics

No. de pieza STM32H745II
Descripción Electrónicos  Dual 32-bit Arm® Cortex®-M7 up to 480MHz and -M4 MCUs,up to 2MB Flash, 1MB RAM, 46 com. and analog interfaces, SMPS
PDF  252 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H745II Datasheet(HTML) 191 Page - STMicroelectronics

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DS12923 Rev 1
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STM32H745xI/G
Electrical characteristics
228
Figure 42. ADC accuracy characteristics (12-bit resolution)
1. Example of an actual transfer curve.
2. Ideal transfer curve.
3. End point correlation line.
4. ET = Total Unadjusted Error: maximum deviation between the actual and the ideal transfer curves.
EO = Offset Error: deviation between the first actual transition and the first ideal one.
EG = Gain Error: deviation between the last ideal transition and the last actual one.
ED = Differential Linearity Error: maximum deviation between actual steps and the ideal one.
EL = Integral Linearity Error: maximum deviation between any actual transition and the end point
correlation line.
Figure 43. Typical connection diagram using the ADC
1. Refer to Table 96 for the values of RAIN, RADC and CADC.
2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
pad capacitance (roughly 5 pF). A high Cparasitic value downgrades conversion accuracy. To remedy this,
fADC should be reduced.
ai14395c
EO
EG
1L SBIDEAL
4095
4094
4093
5
4
3
2
1
0
7
6
1
2
3
456
7
4093 4094 4095 4096
(1)
(2)
ET
ED
EL
(3)
VDDA
VSSA
V REF+
4096
(or
depending on package)]
V DDA
4096
[1LSB IDEAL=
ai17534b
STM32
VDD
AINx
IL±1 μA
0.6 V
VT
RAIN(1)
Cparasitic
VAIN
0.6 V
VT
RADC(1)
CADC(1)
12-bit
converter
Sample and hold ADC
converter



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