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AT89C5131A-RDTIM Datasheet(PDF) 112 Page - ATMEL Corporation |
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AT89C5131A-RDTIM Datasheet(HTML) 112 Page - ATMEL Corporation |
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112 / 186 page ![]() 112 AT89C5130A/31A-M 4337G–USB–11/06 98h Previously addressed with general call; data has been received; NOT ACK has been returned Read data byte or Read data byte or Read data byte or Read data byte 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 1 Switched to the not addressed slave mode; no recognition of own SLA or GCA Switched to the not addressed slave mode; own SLA will be recognised; GCA will be recognised if GC=logic 1 Switched to the not addressed slave mode; no recognition of own SLA or GCA. A START condition will be transmitted when the bus becomes free Switched to the not addressed slave mode; own SLA will be recognised; GCA will be recognised if GC=logic 1. A START condition will be transmitted when the bus becomes free A0h A STOP condition or repeated START condition has been received while still addressed as slave No SSDAT action or No SSDAT action or No SSDAT action or No SSDAT action 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 1 Switched to the not addressed slave mode; no recognition of own SLA or GCA Switched to the not addressed slave mode; own SLA will be recognised; GCA will be recognised if GC=logic 1 Switched to the not addressed slave mode; no recognition of own SLA or GCA. A START condition will be transmitted when the bus becomes free Switched to the not addressed slave mode; own SLA will be recognised; GCA will be recognised if GC=logic 1. A START condition will be transmitted when the bus becomes free Table 83. Status in Slave Receiver Mode (Continued) Status Code (SSCS) Status of the 2-wire bus and 2-wire hardware Application Software Response Next Action Taken By 2-wire Software To/from SSDAT To SSCON STA STO SI AA |
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