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ADC3910CSSS Datasheet(PDF) 121 Page - Texas Instruments

No. de pieza ADC3910CSSS
Descripción Electrónicos  ADC3910Dx and ADC3910Sx 10-bit, 25 to 125-MSPS Low Latency, Low Power, Small, Single and Dual Channel ADC with Integrated Input Buffers
PDF  131 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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ADC3910CSSS Datasheet(HTML) 121 Page - Texas Instruments

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7.5.2 Layout Example
The following screen shot shows the top layer of the ADC3910D125EVM.
• Signal inputs are routed as different signal and along with clock input on the top layer avoiding vias.
• Serial CMOS output interface lanes with isolation resistor.
• Bypass caps are close to the VREF pin on the top layer avoiding vias.
Clock routing
without vias
Analog inputs routed on
top layer with no vias
CMOS output lines
with isolation resistors
Bypass caps
close to VREF pin
Figure 7-7. Layout Example: top layer of ADC3910D125EVM
www.ti.com
ADC3910D125
SBASAD1 – DECEMBER 2023
Copyright © 2023 Texas Instruments Incorporated
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Product Folder Links: ADC3910D125



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