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STM32H523VCU6TR Datasheet(PDF) 122 Page - STMicroelectronics |
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STM32H523VCU6TR Datasheet(HTML) 122 Page - STMicroelectronics |
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122 / 228 page  Electrical characteristics STM32H523xx 122/228 DS14540 Rev 1 Jitter Cycle-to-cycle jitter fVCO_OUT = 128 MHz - 60 - ±ps fVCO_OUT = 200 MHz - 50 - fVCO_OUT = 400 MHz - 20 - fVCO_OUT = 560 MHz - 15 - Long term jitter Normal mode (f PLL_IN = 2 MHz), fVCO_OUT = 560 MHz -±0.2 - % Normal mode (f PLL_IN = 16 MHz), fVCO_OUT = 560 MHz -±0.8 - Sigma-delta mode (f PLL_IN = 2 MHz), fVCO_OUT = 560 MHz -±0.2 - Sigma-delta mode (f PLL_IN = 16 MHz), fVCO_OUT = 560 MHz -±0.8 - IDD(PLL) PLL power consumption on VDD fVCO_OUT = 560 MHz VDD -330 420 μA VCORE -630 - fVCO_OUT = 128 MHz VDD -155 230 VCORE -170 - 1. Specified by design - Not tested in production, unless otherwise specified. 2. This value must be limited to the maximum frequency due to the product limitation. 3. Evaluated by characterization - Not tested in production. Table 46. PLL characteristics (wide VCO frequency range)(1) (continued) Symbol Parameter Conditions Min Typ Max Unit Table 47. PLL characteristics (medium VCO frequency range) Symbol Parameter Conditions Min(1) Typ(1) Max(1) Unit fPLL_IN PLL input clock - 1 - 2 MHz PLL input clock duty cycle - 10 - 90 % fPLL_OUT PLL multiplier output clock P, Q, R VOS0 1.17 - 210 MHz VOS1 1.17 - 210 VOS2 1.17 - 160(2) VOS3 1.17 - 88(2) fVCO_OUT PLL VCO output - 150 - 420 tLOCK PLL lock time Normal mode - 45 80(3) μs Sigma-delta mode Forbidden |
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