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IS25LEG-RGLA2:P-TY Datasheet(PDF) 103 Page - Integrated Silicon Solution, Inc

No. de pieza IS25LEG-RGLA2:P-TY
Descripción Electrónicos  SERIAL FLASH MEMORY 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  193 Pages
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Fabricante Electrónico  ISSI [Integrated Silicon Solution, Inc]
Página de inicio  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LEG-RGLA2:P-TY Datasheet(HTML) 103 Page - Integrated Silicon Solution, Inc

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IS25LE01GG
IS25WE01GG
Integrated Silicon Solution, Inc.- www.issi.com
103
Rev. A3
10/02/2025
8.23 ENTER QUAD PERIPHERAL INTERFACE (QPI) MODE OPERATION (QPIEN, 35h; QPIDI, F5h)
The Enter QPI (QPIEN) instruction, 35h, enables the Flash device for QPI bus operation. Upon completion of the
instruction, all instructions thereafter will be 4-bit multiplexed input/output until a power cycle or an Exit QPI
instruction is sent to device.
The Exit QPI instruction, F5h, resets the device to 1-bit SPI protocol operation. Prior to issuing the F5h command,
the QE bit must be set to 1. To execute an Exit QPI operation, the host drives CE# low, sends the Exit QPI command
cycle, then drives CE# high. The device just accepts QPI (2 clocks) command cycles.
Figure 8.54 Enter Quad Peripheral Interface (QPI) Mode Sequence
Instruction = 35h
CE#
SCK
SI
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SO
High Impedance
Figure 8.55 Exit Quad Peripheral Interface (QPI) Mode Sequence
F5h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0



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