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STM32L4P5CE Datasheet(PDF) 159 Page - STMicroelectronics

No. de pieza STM32L4P5CE
Descripción Electrónicos  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 150 DMIPS, up to 1-MB Flash memory, 320-KB SRAM, LCD-TFT, ext. SMPS
PDF  311 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L4P5CE Datasheet(HTML) 159 Page - STMicroelectronics

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Table 38. Typical current consumption in Run and Low-power run modes with different codes
running from Flash, ART disable and power supplied by external SMPS
Symbol
Parameter
Conditions(1)
TYP
Single Bank
Mode
TYP
Dual Bank
Mode
Unit
TYP
Single Bank
Mode
TYP
Dual Bank
Mode
Unit
-
VDD12
fHCLK
Code
25°C
25°C
25°C
25°C
IDD
(Run)
Supply
current in
Run mode
fHCLK=fHSE up to
48 MHZ
included, bypass
mode PLL ON
above 48 MHz
all peripherals
disable
VDD12=
1.00V
fHCLK=
26 MHz
Reduced code
1.35
1.39
mA
52
53
µA/MHz
Coremark
1.41
1.29
54
50
Dhrystone2.1
1.43
1.31
55
51
Fibonacci
1.39
1.2
53
46
While(1)
1.09
1.09
42
42
VDD12=
1.10V
fHCLK=
26 MHz
Reduced code
1.63
1.68
mA
63
65
µA/MHz
Coremark
1.7
1.57
65
60
Dhrystone2.1
1.73
1.59
66
61
Fibonacci
1.68
1.45
65
56
While(1)
1.32
1.32
51
51
fHCLK=
80 MHz
Reduced code
4.49
4.31
mA
56
54
µA/MHz
Coremark
4.49
3.95
56
49
Dhrystone2.1
4.49
4.13
56
52
Fibonacci
4.31
3.77
54
47
While(1)
3.77
3.77
47
47
IDD
(Run)
Supply
current in
Run mode
fHCLK=fHSE up to
48 MHZ
included, bypass
mode PLL ON
above 48 MHz
all peripherals
disable
VDD12=
1.20V
fHCLK=
120
MHz
Reduced code
7.02
6.42
mA
58
53
µA/MHz
Coremark
6.82
6.02
57
50
Dhrystone 2.1
6.82
6.02
57
50
Fibonacci
6.82
5.61
57
47
While(1)
6.62
6.62
55
55
1.
All values are obtained by calculation based on measurements done without SMPS and using following parameters: SMPS input = 3.3 V, SMPS efficiency = 85%,
VDD12 = 1.10 V.



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