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H8/3021 Datasheet(PDF) 240 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 240 Page - Renesas Technology Corp |
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240 / 712 page ![]() 8. 16-Bit Integrated Timer Unit (ITU) Rev.2.00 Mar. 22, 2007 Page 216 of 684 REJ09B0352-0200 Bits 2 to 0—Timer Prescaler 2 to 0 (TPSC2 to TPSC0): These bits select the counter clock source. Bit 2 TPSC2 Bit 1 TPSC1 Bit 0 TPSC0 Function 0 0 0 Internal clock: φ (Initial value) 1 Internal clock: φ/2 1 0 Internal clock: φ/4 1 Internal clock: φ/8 1 0 0 External clock A: TCLKA input 1 External clock B: TCLKB input 1 0 External clock C: TCLKC input 1 External clock D: TCLKD input When bit TPSC2 is cleared to 0 an internal clock source is selected, and the timer counts only falling edges. When bit TPSC2 is set to 1 an external clock source is selected, and the timer counts the edge or edges selected by bits CKEG1 and CKEG0. When channel 2 is set to phase counting mode (MDF = 1 in TMDR), the settings of bits TPSC2 to TPSC0 in TCR2 are ignored. Phase counting takes precedence. |
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