 |
Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
|
Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
H8/3021 Datasheet(PDF) 249 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
H8/3021 Datasheet(HTML) 249 Page - Renesas Technology Corp |
|
|
249 / 712 page  8. 16-Bit Integrated Timer Unit (ITU) Rev.2.00 Mar. 22, 2007 Page 225 of 684 REJ09B0352-0200 Internal data bus CPU H L Bus interface H L Module data bus TCNTH TCNTL Figure 8.11 Access to Timer Counter (CPU Reads TCNT, Lower Byte) 8.3.2 8-Bit Accessible Registers The registers other than the timer counters, general registers, and buffer registers are 8-bit registers. These registers are linked to the CPU by an internal 8-bit data bus. Figures 8.12 and 8.13 show examples of byte read and write access to a TCR. If a word-size data transfer instruction is executed, two byte transfers are performed. Internal data bus CPU H L Bus interface H L Module data bus TCR Figure 8.12 TCR Access (CPU Writes to TCR) Internal data bus CPU H L Bus interface H L Module data bus TCR Figure 8.13 TCR Access (CPU Reads TCR) |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Mexican ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
