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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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H8/3028F Datasheet(PDF) 341 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 341 Page - Renesas Technology Corp |
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341 / 923 page  Rev. 2.00, 09/03, page 311 of 890 9.1.2 Block Diagrams 16-bit timer Block Diagram (Overall): Figure 9.1 is a block diagram of the 16-bit timer. Module data bus IMIA0 to IMIA2 IMIB0 to IMIB2 OVI0 to OVI2 TCLKA to TCLKD φ, φ/2, φ/4, φ/8 Clock selector Control logic TIOCA0 to TIOCA2 TIOCB0 to TIOCB2 TSTR TSNR TMDR TOLR TISRA TISRB TISRC Legend: TSTR: Timer start register (8 bits) TSNR: Timer synchro register (8 bits) TMDR: Timer mode register (8 bits) TOLR: Timer output level setting register (8 bits) TISRA: Timer interrupt status register A (8 bits) TISRB: Timer interrupt status register B (8 bits) TISRC: Timer interrupt status register C (8 bits) Figure 9.1 16-bit timer Block Diagram (Overall) |
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