H8SLASH3028F datasheet(208/923 Pages) RENESAS

No. de pieza	H8/3028F

Descripción Electrónicos	Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

PDF	923 Pages

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Fabricante Electrónico	RENESAS [Renesas Technology Corp]

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208 / 923 page

Rev. 2.00, 09/03, page 178 of 890

No.

CKS2 to CKS0

Write Timing

RTCNT Operation

High

→ High

switchover*

N+1

RTCNT

N+2

Old clock source

New clock source

RTCNT clock

CKS bits rewritten

Notes: 1. Including switchovers from a low clock source to the halted state, and from the halted

state to a low clock source.

2. Including switchover from the halted state to a high clock source.

3. Including switchover from a high clock source to the halted state.

4. The switchover is regarded as a falling edge, causing RTCNT to increment.

6.7

Interrupt Sources

Compare match interrupts (CMI) can be generated when the refresh timer is used as an interval

timer. Compare match interrupt requests are masked/unmasked with the CMIE bit in RTMCSR.

6.8

Burst ROM Interface

6.8.1

Overview

With the H8/3028 Group, external space area 0 can be designated as burst ROM space, and burst

ROM space interfacing can be performed. The burst ROM space interface enables 16-bit

organization ROM with burst access capability to be accessed at high speed. Area 0 is designated

as burst ROM space by means of the BROME bit in BCR.

Continuous burst access of a maximum or four or eight words can be performed on external space

area 0. Two or three states can be selected for burst access.

H8/3028F Datasheet(PDF) 208 Page - Renesas Technology Corp