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H8/3028F Datasheet(PDF) 238 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 238 Page - Renesas Technology Corp |
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238 / 923 page ![]() Rev. 2.00, 09/03, page 208 of 890 Bits 2 to 0—Data Transfer Select 2B to 0B (DTS2B, DTS1B, DTS0B): These bits select the data transfer activation source. The selectable activation sources differ between normal mode and block transfer mode. • Normal mode Bit 2 DTS2B Bit 1 DTS1B Bit 0 DTS0B Description 0 0 0 Auto-request (burst mode) (Initial value) 1 Cannot be used 1 0 Auto-request (cycle-steal mode) 1 Cannot be used 1 0 0 Cannot be used 1 Cannot be used 1 0 Falling edge of DREQ 1 Low level input at DREQ • Block transfer mode Bit 2 DTS2B Bit 1 DTS1B Bit 0 DTS0B Description 0 0 0 Compare match/input capture A interrupt from 16-bit timer channel 0 (Initial value) 1 Compare match/input capture A interrupt from 16-bit timer channel 1 1 0 Compare match/input capture A interrupt from 16-bit timer channel 2 1 Conversion-end interrupt from A/D converter 1 0 0 Cannot be used 1 Cannot be used 1 0 Falling edge of DREQ 1 Cannot be used The same internal interrupt can be selected to activate two or more channels. The channels are activated in a priority order, highest priority first. For the priority order, see section 7.4.9, Multiple-Channel Operation. |
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