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H8/3028F Datasheet(PDF) 267 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 267 Page - Renesas Technology Corp |
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267 / 923 page ![]() Rev. 2.00, 09/03, page 237 of 890 7.4.11 NMI Interrupts and DMAC NMI interrupts do not affect DMAC operations in short address mode. If an NMI interrupt occurs during a transfer in full address mode, the DMAC suspends operations. In full address mode, a channel is enabled when its DTE and DTME bits are both set to 1. NMI input clears the DTME bit to 0. After transferring the current byte or word, the DMAC releases the bus to the CPU. In normal mode, the suspended transfer resumes when the CPU sets the DTME bit to 1 again. Check that the DTE bit is set to 1 and the DTME bit is cleared to 0 before setting the DTME bit to 1. Figure 7.21 shows the procedure for resuming a DMAC transfer in normal mode on channel 0 after the transfer was halted by NMI input. Resuming DMAC transfer in normal mode DTE = 1 DTME = 0 Set DTME to 1 DMA transfer continues End 1. 2. Check that DTE = 1 and DTME = 0. Read DTCRB while DTME = 0, then write 1 in the DTME bit. 2 No Yes 1 Figure 7.21 Procedure for Resuming a DMAC Transfer Halted by NMI (Example) For information about NMI interrupts in block transfer mode, see section 7.6.6, NMI Interrupts and Block Transfer Mode. |
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