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H8/3028F Datasheet(PDF) 327 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 327 Page - Renesas Technology Corp |
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327 / 923 page ![]() Rev. 2.00, 09/03, page 297 of 890 8.12 Port B 8.12.1 Overview Port B is an 8-bit input/output port that is also used for output (TP15 to TP8) from the programmable timing pattern controller (TPC), input/output (TMIO3, TMO2, TMIO1, TMO0) by the 8-bit timer, CS 7 to CS4 output, input (DREQ1, DREQ0) to the DMA controller (DMAC), input and output (TxD2, RxD2, SCK2) by serial communication interface channel 2 (SCI2), and output ( UCAS, LCAS) by the DRAM interface. See table 8.23 to 8.24 for the selection of pin functions. A reset or hardware standby transition leaves port B as an input port. For output of CS 7 to CS4 in modes 1 to 5, see section 6.3.4, Chip Select Signals. When DRAM is connected to areas 2, 3, 4, and 5, the CS 4 and CS5 output pins become RAS output pins for these areas. For details see section 6.5, DRAM Interface. Pins not assigned to any of these functions are available for generic input/output. Figure 8.11 shows the pin configuration of port B. When DRAM is connected to areas 2, 3, 4, and 5, the CS 4 and CS5 output pins become RAS output pins for these areas. For details see section 6.5, DRAM Interface. Pins in port B can drive one TTL load and a 30-pF capacitive load. They can also drive darlington transistor pair. |
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