8

8021DS–AVR–06/08

ATmega329P/3290P

2.3.12

RESET

Reset input. A low level on this pin for longer than the minimum pulse length will generate a

reset, even if the clock is not running. The minimum pulse length is given in ”System and Reset

Characteristics” on page 330. Shorter pulses are not guaranteed to generate a reset.

2.3.13

XTAL1

Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.

2.3.14

XTAL2

Output from the inverting Oscillator amplifier.

2.3.15

AVCC

AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con-

nected to V

through a low-pass filter.

2.3.16

AREF

This is the analog reference pin for the A/D Converter.

2.3.17

LCDCAP

An external capacitor (typical > 470 nF) must be connected to the LCDCAP pin as shown in Fig-

ure 22-2. This capacitor acts as a reservoir for LCD power (V

ripple on V