SN54AS885, SN74AS885

8-BIT MAGNITUDE COMPARATORS

SDAS236A – DECEMBER 1982 – REVISED JANUARY 1995

3

POST OFFICE BOX 655303

logic diagram (positive logic)

Q0

ARITH

LOGIC

1

2

11

3

10

9

8

7

6

5

4

15

16

17

18

19

20

21

22

23

4MSB =

P0 = Q0

P1 = Q1

P2 = Q2

P3 = Q3

P5 = Q5

P7 = Q7

P6 = Q6

14

13

PLE

P7

P6

P5

P4

P3

P2

P1

P0

Q7

Q6

Q5

Q4

Q3

Q2

Q1

Q0

P > QIN

P < QIN

L/A

P < QOUT

P > QOUT

C1

P7

P7

P6

P6

P5

P5

P4

P4

P3

P3

P2

P2

P1

P1

P0

P0

Q7

Q7

Q6

Q6

Q5

Q5

Q4

Q4

Q3

Q3

Q2

Q2

Q1

Q1

Q0

1D

Pin numbers shown are for the DW, JT, and NT packages.