PIC16F720-ESLASHML datasheet(110/244 Pages) MICROCHIP

110 / 244 page

PIC16F/LF720/721

DS41430A-page 110

 2010 Microchip Technology Inc.

15.1

Capture Mode

In Capture mode, CCPR1H:CCPR1L captures the

16-bit value of the TMR1 register when an event occurs

on pin CCP1. An event is defined as one of the

following and is configured by the CCP1M<3:0> bits of

the CCP1CON register:

• Every falling edge

• Every rising edge

• Every 4th rising edge

• Every 16th rising edge

When a capture is made, the Interrupt Request Flag bit

CCP1IF of the PIR1 register is set. The interrupt flag

must be cleared in software. If another capture occurs

before the value in the CCPR1H, CCPR1L register pair

is read, the old captured value is overwritten by the new

captured value (refer to Figure 15-1).

15.1.1

CCP1 PIN CONFIGURATION

In Capture mode, the CCP1 pin should be configured

as an input by setting the associated TRIS control bit.

FIGURE 15-1:

CAPTURE MODE

OPERATION BLOCK

DIAGRAM

15.1.2

TIMER1 MODE SELECTION

Timer1 must be running in Timer mode or Synchronized

Counter mode for the CCP module to use the capture

feature. In Asynchronous Counter mode or when

Timer1 is clocked at FOSC, the capture operation may

not work.

15.1.3

SOFTWARE INTERRUPT

When the Capture mode is changed, a false capture

interrupt may be generated. The user should keep the

CCP1IE interrupt enable bit of the PIE1 register clear to

avoid false interrupts. Additionally, the user should

clear the CCP1IF interrupt flag bit of the PIR1 register

following any change in operating mode

15.1.4

CCP PRESCALER

There are four prescaler settings specified by the

CCP1M<3:0>

bits

the

CCP1CON

Whenever the CCP module is turned off, or the CCP

module is not in Capture mode, the prescaler counter

is cleared. Any Reset will clear the prescaler counter.

Switching from one capture prescaler to another does not

clear the prescaler and may generate a false interrupt. To

avoid this unexpected operation, turn the module off by

clearing the CCP1CON register before changing the

prescaler (refer to Example 15-1).

EXAMPLE 15-1:

CHANGING BETWEEN

CAPTURE PRESCALERS

15.1.5

CAPTURE DURING SLEEP

Capture mode depends upon the Timer1 module for

proper operation. There are two options for driving the

Timer1 module in Capture mode. It can be driven by the

instruction clock (FOSC/4), or by an external clock

source.

If Timer1 is clocked by FOSC/4, then Timer1 will not

increment during Sleep. When the device wakes from

Sleep, Timer1 will continue from its previous state.

If Timer1 is clocked by an external clock source, then

Capture mode will operate as defined in Section 15.1

“Capture Mode”.

Note:

If the CCP1 pin is configured as an output,

a write to the port can cause a capture

condition.

Note:

Clocking Timer1 from the system clock

(FOSC) should not be used in Capture

mode. In order for Capture mode to

recognize the trigger event on the CCP1

pin, Timer1 must be clocked from the

Instruction Clock (FOSC/4) or from an

external clock source.

CCPR1H

CCPR1L

TMR1H

TMR1L

Set Flag bit CCP1IF

(PIR1 register)

Capture

Enable

CCP1CON<3:0>

Prescaler

 1, 4, 16

and

Edge Detect

CCP1

System Clock (FOSC)

BANKSEL CCP1CON

;Set Bank bits to point

;to CCP1CON

CLRF

CCP1CON

;Turn CCP module off

MOVLW

NEW_CAPT_PS ;Load the W reg with

; the new prescaler

; move value and CCP ON

MOVWF

CCP1CON

;Load CCP1CON with this

; value

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