WM8904ECSSLASHR datasheet(142/188 Pages) WOLFSON

142 / 188 page

WM8904

Pre-Production

PP, Rev 3.3, September 2012

142

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R0 (00h)

SW Reset

and ID

15:0

SW_RST_DEV

_ID1 [15:0]

1000_1001

_0000_010

Writing to this register resets all registers to their default

state.

Reading from this register will indicate Device ID

8904h.

Software Reset

and Chip ID

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R4 (04h)

Bias Control

3:2

ISEL [1:0]

Master Bias Control

00 = Low power bias

01 = Reserved

10 = High performance bias (default)

11 = Reserved

Note that the ISEL register should only be changed as

part of the Low Power Mode Enable/Disable

sequences.

Reference

Voltages and

Master Bias

BIAS_ENA

Enables the Normal bias current generator (for all

analogue functions)

0 = Disabled

1 = Enabled

Reference

Voltages and

Master Bias

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R5 (05h)

VMID

Control 0

VMID_BUF_EN

Enable VMID buffer to unused Inputs/Outputs

0 = Disabled

1 = Enabled

Analogue Outputs

2:1

VMID_RES

[1:0]

VMID Divider Enable and Select

00 = VMID disabled (for OFF mode)

01 = 2 x 50k divider (for normal operation)

10 = 2 x 250k divider (for low power standby)

11 = 2 x 5k divider (for fast start-up)

Analogue Outputs

VMID_ENA

VMID Buffer Enable

0 = Disabled

1 = Enabled

Analogue Outputs

WM8904ECS/R Datasheet(PDF) 142 Page - Wolfson Microelectronics plc

WM8904ECS/R Datasheet(HTML) 142 Page - Wolfson Microelectronics plc

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