OMAP3530ECBC72 datasheet(132/264 Pages) TI1

No. de pieza	OMAP3530ECBC72

Descripción Electrónicos	OMAP3530/25 Applications Processor: OMAP 3 Architecture

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Fabricante Electrónico	TI1 [Texas Instruments]

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3.6.2

Power-down Sequence

034-009

vdds_dpll_dll,

vdds_dpll_per

vdd_core,

vdd_mpu_iva

sys_32k

sys_nrespwron

sys_xtalin

vdds_mmc1,vdds_mmc1a,

vdda_dac

vdds_sram

vdds_wkup_bg

vdds,

vdds_mem

OMAP3530/25 Applications Processor

SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009

www.ti.com

The following steps give an example of the power-down sequence supported by the OMAP3530/25

device.

1. Reset OMAP3530/25 device.

2. Stop all signals driven to OMAP3530/25 balls.

3. Option 1: Power down all domains simutaneously.

4. Option 2: If all domains cannot be powered down simultaneously, follow the below sequence:

Power off all complex I/O domains (vdds_mmc1, vdds_mmc1a, vdda_dac)

Power off all core domains (vdd_core, vdd_mpu_iva)

Power off all PLL domains (vdds_dpll_dll, vdds_dpll_per)

Power off all SRAM LDOs (vdds_sram)

Power off all reference domains (vdds_wkup_bg)

Power off all standard I/O domains (vdds, vdds_mem)

The OMAP3530/25 device proceeds with the power-down sequence shown in .

Figure 3-4. Power-down Sequence

132

ELECTRICAL CHARACTERISTICS

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OMAP3530ECBC72 Datasheet(PDF) 132 Page - Texas Instruments