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STM32F217VG Datasheet(PDF) 133 Page - STMicroelectronics

No. de pieza STM32F217VG
Descripción Electrónicos  ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/1284KB RAM
PDF  175 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F217VG Datasheet(HTML) 133 Page - STMicroelectronics

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DocID17050 Rev 9
133/175
STM32F21xxx
Electrical characteristics
174
Figure 57. Asynchronous multiplexed PSRAM/NOR write waveforms
Table 74. Asynchronous multiplexed PSRAM/NOR write timings(1)(2)
1. CL = 30 pF.
2. Based on characterization, not tested in production.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
4THCLK-1
4THCLK+1
ns
tv(NWE_NE)
FSMC_NEx low to FSMC_NWE low
THCLK- 1
THCLK
ns
tw(NWE)
FSMC_NWE low tim e
2THCLK
2THCLK+1
ns
th(NE_NWE)
FSMC_NWE high to FSMC_NE high hold time
THCLK- 1
-
ns
tv(A_NE)
FSMC_NEx low to FSMC_A valid
-
0
ns
tv(NADV_NE)
FSMC_NEx low to FSMC_NADV low
1
2
ns
tw(NADV)
FSMC_NADV low time
THCLK– 2
THCLK+ 2
ns
th(AD_NADV)
FSMC_AD(adress) valid hold time after
FSMC_NADV high)
THCLK
-ns
th(A_NWE)
Address hold time after FSMC_NWE high
THCLK– 0.5
-
ns
th(BL_NWE)
FSMC_BL hold time after FSMC_NWE high
THCLK- 1
-
ns
tv(BL_NE)
FSMC_NEx low to FSMC_BL valid
-
0.5
ns
tv(Data_NADV)
FSMC_NADV high to Data valid
-
THCLK+2
ns
th(Data_NWE)
Data hold time after FSMC_NWE high
THCLK– 0.5
-
ns
NBL
Data
FSMC_NEx
FSMC_NBL[1:0]
FSMC_AD[15:0]
tv(BL_NE)
th(Data_NWE)
FSMC_NOE
Address
FSMC_A[25:16]
tv(A_NE)
tw(NWE)
FSMC_NWE
tv(NWE_NE)
t h(NE_NWE)
th(A_NWE)
th(BL_NWE)
t v(A_NE)
tw(NE)
ai14891B
Address
FSMC_NADV
t v(NADV_NE)
tw(NADV)
t v(Data_NADV)
th(AD_NADV)



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