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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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LAN9500AI Datasheet(PDF) 102 Page - Microchip Technology |
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LAN9500AI Datasheet(HTML) 102 Page - Microchip Technology |
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102 / 213 page  LAN950x DS00001875A-page 102 2010 - 2015 Microchip Technology Inc. FIGURE 5-31: GPIOS 0-7 WAKE DETECTION LOGIC (LAN9500/LAN9500I) Note: The IME bit is in the Hardware Configuration Register (HW_CFG). General Purpose IO Configuration Reg- ister (GPIO_CFG) and General Purpose IO Wake Enable and Polarity Register (GPIO_WAKE) must be set accordingly. Diagram does not represent actual hardware implementation. FIGURE 5-32: GPIOS 8-10 WAKE DETECTION LOGIC (LAN9500/LAN9500I) Note: The IME bit is in the Hardware Configuration Register (HW_CFG). General Purpose IO Configuration Reg- ister (GPIO_CFG) and General Purpose IO Wake Enable and Polarity Register (GPIO_WAKE) must be set accordingly. Diagram does not represent actual hardware implementation. GPIOn_INT clear GPIOn GPIOPOLn Latch GPIODIRn GPIODn GPIOENn GPIOWKn GPIOn_DET IME GPIOn_INT clear GPIOn GPIOPOLn Latch GPDIRn GPDn GPCTLn[0] GPIOWKn GPIOn_DET IME GPCTLn[1] |
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