LAN9500AI datasheet(136/213 Pages) MICROCHIP

No. de pieza	LAN9500AI

Descripción Electrónicos	LAN950x USB 2.0 to 10/100 Ethernet Controller

PDF	213 Pages

Scroll/Zoom	100%

Fabricante Electrónico	MICROCHIP [Microchip Technology]

Página de inicio	http://www.microchip.com

Logo

136 / 213 page

LAN950x

DS00001875A-page 136

 2010 - 2015 Microchip Technology Inc.

7.3.12

EEPROM COMMAND REGISTER (E2P_CMD)

This register is used to control the read and write operations on the Serial EEPROM.

Address:

030h

Size:

32 bits

Bits

Description

Type

Default

EPC Busy

When a “1” is written into this bit, the operation specified in the EPC

Command field is performed at the specified EEPROM address. This bit will

remain set until the operation is complete. In the case of a read, this means

that the Host can read valid data from the E2P Data register. The E2P_CMD

and E2P_DATA registers should not be modified until this bit is cleared. In

the case where a write is attempted and an EEPROM is not present, the EPC

Busy remains busy until the EPC Time-out occurs. At that time, the busy bit

is cleared.

Note:

EPC busy will be high immediately following power-up, chip-level,

or USB reset. After the EEPROM controller has finished reading (or

attempting to read) the USB Descriptors and Ethernet default

LAN9500AI Datasheet(PDF) 136 Page - Microchip Technology