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CS5530 Datasheet(PDF) 107 Page - National Semiconductor (TI) |
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CS5530 Datasheet(HTML) 107 Page - National Semiconductor (TI) |
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107 / 241 page ![]() Revision 4.1 107 www.national.com Functional Description (Continued) Table 3-55. PIO Programming Registers Bit Description F2BAR+I/O Offset 20h-23h Channel 0 Drive 0 PIO Register (R/W) Reset Value = 0000E132h (Note) If Offset 24h[31] = 0, Format 0: Selects slowest PIOMODE per channel for commands. Format 0 settings for: PIO Mode 0 = 00009172h PIO Mode 1 = 00012171h PIO Mode 2 = 00020080h PIO Mode 3 = 00032010h PIO Mode 4 = 00040010h 31:20 Reserved: Set to 0. 19:16 PIOMODE: PIO mode 15:12 t2I: Recovery time (value + 1 cycle) 11:8 t3: IDE_IOW# data setup time (value + 1 cycle) 7:4 t2W: IDE_IOW# width minus t3 (value + 1 cycle) 3:0 t1: Address Setup Time (value + 1 cycle) If Offset 24h[31] = 1, Format 1: Allows independent control of command and data. Format 1 settings for: PIO Mode 0 = 9172D132h PIO Mode 1 = 21717121h PIO Mode 2 = 00803020h PIO Mode 3 = 20102010h PIO Mode 4 = 00100010h 31:28 t2IC: Command cycle recovery time (value + 1 cycle) 27:24 t3C: Command cycle IDE_IOW# data setup (value + 1 cycle) 23:20 t2WC: Command cycle IDE_IOW# pulse width minus t3 (value + 1 cycle) 19:16 t1C: Command cycle address setup time (value + 1 cycle) 15:12 t2ID: Data cycle recovery time (value + 1 cycle) 11:8 t3D: Data cycle IDE_IOW# data setup (value + 1 cycle) 7:4 t2WD: Data cycle IDE_IOW# pulse width minus t3 (value + 1 cycle) 3:0 t1D: Data cycle address Setup Time (value + 1 cycle) Note: The reset value of this register is not a valid PIO Mode. F2BAR+I/O Offset 28h-2Bh Channel 0 Drive 1 PIO Register (R/W) Reset Value = 0000E132h Channel 0 Drive 1 Programmed I/O Control Register: Refer to F2BAR+I/O Offset 20h for bit descriptions. F2BAR+I/O Offset 30h-33h Channel 1 Drive 0 PIO Register (R/W) Reset Value = 0000E132h Channel 1 Drive 0 Programmed I/O Control Register: Refer to F2BAR+I/O Offset 20h for bit descriptions. F2BAR+I/O Offset 38h-3Bh Channel 1 Drive 1 PIO Register (R/W) Reset Value = 0000E132h Channel 1 Drive 1 Programmed I/O Control Register: Refer to F2BAR+I/O Offset 20h for bit descriptions. |
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