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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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STM32F413XG Datasheet(PDF) 135 Page - STMicroelectronics |
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STM32F413XG Datasheet(HTML) 135 Page - STMicroelectronics |
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135 / 207 page  DocID029162 Rev 2 135/207 STM32F413xG/H Electrical characteristics 174 Figure 40. SPI timing diagram - slave mode and CPHA = 0 ta(SO) Data output access time Slave mode 7 - 21 ns tdis(SO) Data output disable time Slave mode 5 - 12 ns tv(SO) Data output valid time Slave mode (after enable edge), 2.7 V < VDD < 3.6 V -7 12.5 ns Slave mode (after enable edge), 1.71 V < VDD < 3.6 V -7 19 tv(MO) Master mode - 2 3 th(SO) Data output hold time Slave mode 1.71 V < VDD < 3.6 V 6- - ns th(MO) Master mode 1.5 - - 1. Guaranteed by characterization. 2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit into SCK low or high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master having tsu(MI) = 0 while Duty(SCK) = 50% Table 66. SPI dynamic characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max Unit |
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