ST7MC1K2-Auto datasheet(121/371 Pages) STMICROELECTRONICS

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On-chip peripherals

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Control register 2 (CR2)

CR2

Reset value: 0000 0000 (00h)

654

OC1E

OC2E

OPM

PWM

CC[1:0]

IEDG2

EXEDG

R/W

Table 51.

CR2 register description

Bit

Name

Function

OC1E

Output compare 1 pin enable

This bit is used only to output the signal from the timer on the OCMP1 pin (OLV1

in output compare mode, both OLV1 and OLV2 in PWM and one-pulse mode).

Whatever the value of the OC1E bit, the output compare 1 function of the timer

remains active.

0: OCMP1 pin alternate function disabled (I/O pin free for general-purpose I/O)

1: OCMP1 pin alternate function enabled

60C2E

Output compare 2 pin enable

This bit is used only to output the signal from the timer on the OCMP2 pin (OLV2

in output compare mode). Whatever the value of the OC2E bit, the output

compare 2 function of the timer remains active.

0: OCMP2 pin alternate function disabled (I/O pin free for general-purpose I/O)

1: OCMP2 pin alternate function enabled

5OPM

One pulse mode

0: One pulse mode is not active

1: One pulse mode is active, the ICAP1 pin can be used to trigger one pulse on

the OCMP1 pin; the active transition is given by the IEDG1 bit. The length of

the generated pulse depends on the contents of the OC1R register.

4PWM

Pulse width modulation

0: PWM mode is not active

1: PWM mode is active, the OCMP1 pin outputs a programmable cyclic signal;

the length of the pulse depends on the value of OC1R register; the period

depends on the value of OC2R register.

3:2

CC[1:0]

Clock control

The timer clock mode depends on the following bits:

00: Timer clock = fCPU/4

01: Timer clock = fCPU/2

10: Timer clock = fCPU/8

11: Timer clock = external clock (where available)

Note: If the external clock pin is not available, programming the external clock

configuration stops the counter.

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