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STM32F401CDU6 Datasheet(PDF) 105 Page - STMicroelectronics

No. de pieza STM32F401CDU6
Descripción Electrónicos  Clock, reset and supply management
PDF  135 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F401CDU6 Datasheet(HTML) 105 Page - STMicroelectronics

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DocID025644 Rev 3
105/135
STM32F401xD STM32F401xE
Electrical characteristics
114
USB OTG full speed (FS) characteristics
This interface is present in USB OTG FS controller.
Note:
When VBUS sensing feature is enabled, PA9 should be left at their default state (floating
input), not as alternate function. A typical 200 µA current consumption of the embedded
sensing block (current to voltage conversion to determine the different sessions) can be
observed on PA9 when the feature is enabled.
Table 63. USB OTG FS startup time
Symbol
Parameter
Max
Unit
tSTARTUP(1)
1. Guaranteed by design, not tested in production.
USB OTG FS transceiver startup time
1
µs
Table 64. USB OTG FS DC electrical characteristics
Symbol
Parameter
Conditions
Min.(1)
1. All the voltages are measured from the local ground potential.
Typ. Max.(1) Unit
Input
levels
VDD
USB OTG FS operating
voltage
3.0(2)
2. The USB OTG FS functionality is ensured down to 2.7 V but not the full USB full speed electrical
characteristics which are degraded in the 2.7-to-3.0 V VDD voltage range.
-3.6
V
VDI(3)
3. Guaranteed by design, not tested in production.
Differential input sensitivity
I(USB_FS_DP/DM)
0.2
-
-
V
VCM(3)
Differential common mode
range
Includes VDI range
0.8
-
2.5
VSE(3)
Single ended receiver
threshold
1.3
-
2.0
Output
levels
VOL Static output level low
RL of 1.5 kΩ to 3.6 V(4)
4. RL is the load connected on the USB OTG FS drivers.
--
0.3
V
VOH Static output level high
RL of 15 kΩ to VSS(4)
2.8
-
3.6
RPD
PA11, PA12
(USB_FS_DM/DP)
VIN = VDD
17
21
24
k
Ω
PA9 (OTG_FS_VBUS)
0.65
1.1
2.0
RPU
PA11, PA12
(USB_FS_DM/DP)
VIN = VSS
1.5
1.8
2.1
PA9 (OTG_FS_VBUS)
VIN = VSS
0.25
0.37
0.55



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