Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Mexican  ▼
ALLDATASHEET.COM.MX

X  

STM32F401CDU6 Datasheet(PDF) 114 Page - STMicroelectronics

No. de pieza STM32F401CDU6
Descripción Electrónicos  Clock, reset and supply management
PDF  135 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F401CDU6 Datasheet(HTML) 114 Page - STMicroelectronics

Back Button STM32F401CDU6 Datasheet HTML 110Page - STMicroelectronics STM32F401CDU6 Datasheet HTML 111Page - STMicroelectronics STM32F401CDU6 Datasheet HTML 112Page - STMicroelectronics STM32F401CDU6 Datasheet HTML 113Page - STMicroelectronics STM32F401CDU6 Datasheet HTML 114Page - STMicroelectronics STM32F401CDU6 Datasheet HTML 115Page - STMicroelectronics STM32F401CDU6 Datasheet HTML 116Page - STMicroelectronics STM32F401CDU6 Datasheet HTML 117Page - STMicroelectronics STM32F401CDU6 Datasheet HTML 118Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 114 / 135 page
background image
Electrical characteristics
STM32F401xD STM32F401xE
114/135
Figure 45. SD default mode
6.3.25
RTC characteristics
CK
D, CMD
(output)
tOVD
tOHD
ai14888
Table 77. Dynamic characteristics: SD / MMC characteristics(1)(2)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fPP
Clock frequency in data transfer mode
0
-
48
MHz
-
SDIO_CK/fPCLK2 frequency ratio
-
-
8/3
-
tW(CKL)
Clock low time
fpp = 48MHz
8.5
9
-
ns
tW(CKH)
Clock high time
fpp = 48MHz
8.3
10
-
CMD, D inputs (referenced to CK) in MMC and SD HS mode
tISU
Input setup time HS
fpp = 48MHz
3.5
-
-
ns
tIH
Input hold time HS
fpp = 48MHz
0
-
-
CMD, D outputs (referenced to CK) in MMC and SD HS mode
tOV
Output valid time HS
fpp = 48MHz
-
4.5
7
ns
tOH
Output hold time HS
fpp = 48MHz
3
-
-
CMD, D inputs (referenced to CK) in SD default mode
tISUD
Input setup time SD
fpp = 24MHz
1.5
-
-
ns
tIHD
Input hold time SD
fpp = 24MHz
0.5
-
-
CMD, D outputs (referenced to CK) in SD default mode
tOVD
Output valid default time SD
fpp =24MHz
-
4.5
6.5
ns
tOHD
Output hold default time SD
fpp =24MHz
3.5
-
-
1. Data based on characterization results, not tested in production.
2. VDD = 2.7 to 3.6 V.
Table 78. RTC characteristics
Symbol
Parameter
Conditions
Min
Max
-fPCLK1/RTCCLK frequency ratio
Any read/write operation
from/to an RTC register
4-



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com