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STM32F769AI Datasheet(PDF) 221 Page - STMicroelectronics |
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STM32F769AI Datasheet(HTML) 221 Page - STMicroelectronics |
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221 / 255 page ![]() DocID029041 Rev 4 221/255 STM32F765xx STM32F767xx STM32F768Ax STM32F769xx Electrical characteristics 224 twh(CKIN) twl(CKIN) Input clock high and low time SPI mode (SITP[1:0]=0,1), External clock mode (SPICKSEL[1:0]=0), 1.71 < VDD < 3.6 V TCKIN/2 - 0.5 TCKIN/2 - ns tsu Data input setup time SPI mode (SITP[1:0]=0,1), External clock mode (SPICKSEL[1:0]=0), 1.71 < VDD < 3.6 V 2- - th Data input hold time SPI mode (SITP[1:0]=0,1), External clock mode (SPICKSEL[1:0]=0), 1.71 < VDD < 3.6 V 3- - TManchester Manchester data period (recovered clock period) Manchester mode (SITP[1:0]=2,3), Internal clock mode (SPICKSEL[1:0] ≠0), 1.71 < VDD < 3.6 V (CKOUTDIV+1) * TDFSDMCLK - (2*CKOUTDIV) * TDFSDMCLK Table 122. DFSDM measured timing 1.71-3.6V (continued) Symbol Parameter Conditions Min Typ Max Unit |
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