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GD25Q128CXIGX Datasheet(PDF) 23 Page - ELM Electronics

No. de pieza GD25Q128CXIGX
Descripción Electrónicos  3.3V Uniform Sector Dual and Quad Serial Flash
PDF  69 Pages
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Fabricante Electrónico  ELM [ELM Electronics]
Página de inicio  http://www.elmelectronics.com
Logo ELM - ELM Electronics

GD25Q128CXIGX Datasheet(HTML) 23 Page - ELM Electronics

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23
Rev.1.2
69 -
http://www.elm-tech.com
GD25Q128CxIGx 3.3V Uniform Sector Dual and Quad Serial Flash
7.8. Dual Output Fast Read (3BH)
The Dual Output Fast Read command is followed by 3-byte address (A23-A0) and a dummy byte, each bit
being latched in during the rising edge of SCLK, then the memory contents are shifted out 2-bit per clock cycle
from SI and SO.
The command sequence is shown in followed Figure10. The first byte addressed can be at any location. The
address is automatically incremented to the next higher address after each byte of data is shifted out.
Figure 10. Dual Output Fast Read Sequence Diagram
Fast Read (0BH) in QPI mode
The Fast Read command is also supported in QPI mode. In QPI mode, the number of dummy clocks is
configured by the “Set Read Parameters (C0H)” command to accommodate a wide range application with
different needs for either maximum Fast Read frequency or minimum data access latency. Depending on the
Read Parameter Bits P[5:4] setting, the number of dummy clocks can be configured as either 4/6/8/8.
Figure 9a. Read Data Bytes at Higher Speed Sequence Diagram (QPI)
CS#
SCLK
IO0
IO1
IO2
IO3
0
1
2
3
4
5
Command
0BH
20
12
16
8
6
7
8
9 10
4
4
0
0
4
0 4
0
4
21
13
17
9
5
5
1
1
5
1 5
1
5
22
14
18
10 6
6
2
2
6
2 6
2
6
23
15
19
11 7
7
3
3
7
3 7
3
7
A23-16 A15-8 A7-0 Dummy*
11 12 13
IOs switch from
Input to output
Byte1 Byte2
*"Set Read Parameters" Command (C0H)
can set the number of dummy clocks


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