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GD25Q128CXIGX Datasheet(PDF) 8 Page - ELM Electronics |
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GD25Q128CXIGX Datasheet(HTML) 8 Page - ELM Electronics |
8 / 69 page ![]() 8 Rev.1.2 69 - http://www.elm-tech.com GD25Q128CxIGx 3.3V Uniform Sector Dual and Quad Serial Flash Figure 1. Hold Condition HOLD HOLD CS# SCLK HOLD# RESET The RESET# pin allows the device to be reset by the control. For the WSON8 package, the pin7 can be configured as a RESET# pin depending on the status register setting, which need QE=0 and HOLD/RST=1. On the SOP16 package, a dedicated RESET# pin is provided and it is independent of QE bit setting. The RESET# pin goes low for a period of tRLRH or longer will reset the flash. After reset cycle, the flash is at the following states: - Standby mode - All the volatile bits will return to the default status as power on. Figure 2. RESET Condition CS# RESET# RESET |
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