## STDRIVEG611: High-Speed Half-Bridge Gate Driver The **STDRIVEG611** is a high-speed gate driver specifically designed by STMicroelectronics to drive **GaN (Gallium Nitride) enhancement mode (e-mode) FETs** or N-channel silicon MOSFETs. It is optimized for high-frequency switching applications where efficiency and space are critical. --- ### Key Technical Specifications | Feature | Specification | | :--- | :--- | | **Driver Configuration** | Half-Bridge (High-Side and Low-Side) | | **Output Current** | 1.3 A Sink / 1.9 A Source | | **Voltage Range (Vcc)** | 4.5 V to 6.5 V | | **High-Side Voltage (Vboot)** | Up to 600 V | | **Propagation Delay** | 45 ns (typical) | | **Delay Matching** | < 1 ns | | **Package** | QFN 3x3 mm, 10-lead | --- ### Core Electronic Components & Features The STDRIVEG611 integrates several critical functions to ensure the safe operation of GaN transistors, which are more sensitive to gate voltage than traditional Silicon MOSFETs. #### 1. Integrated Bootstrap Diode GaN drivers typically require a bootstrap circuit to power the high-side floating section. The STDRIVEG611 includes an internal high-voltage bootstrap diode, reducing the external Bill of Materials (BOM) and saving PCB space. #### 2. Logic Inputs & PWM Control The device features two independent logic inputs (HI and LI) that are CMOS/TTL compatible. These inputs control the high-side and low-side outputs respectively. * **Interlocking:** It includes an interlocking mechanism to prevent cross-conduction (shoot-through). * **Dead-time:** While the device allows independent control, users must manage dead-time externally or via the controller to ensure both switches are never ON simultaneously. #### 3. Undervoltage Lockout (UVLO) GaN FETs require a precise gate voltage (typically ~5V). If the supply voltage drops too low, the FET may enter a linear region and overheat. The UVLO protection ensures the outputs remain LOW if the $V_{cc}$ or $V_{boot}$ voltages are below the operational threshold. #### 4. High-Speed Level Shifter Because the high-side FET's source terminal floats up to 600V, the internal level shifter transmits the control signal from the low-voltage logic side to the high-voltage floating side with minimal delay and high immunity to $dV/dt$ noise. --- ### Application Circuit Block Diagram A typical implementation involves the following external components: ```mermaid graph LR PWM_Controller --> STDRIVEG611 STDRIVEG611 --> GaN_High_Side STDRIVEG611 --> GaN_Low_Side Vcc_Supply --> STDRIVEG611 Bootstrap_Capacitor --- STDRIVEG611 ``` --- ### Target Applications * **High-density DC-DC Converters:** Telecom and Server power supplies. * **Micro-inverters:** Solar energy harvesting. * **Wireless Charging:** High-frequency resonant power transfer. * **Motor Drivers:** High-speed brushless DC (BLDC) motors. ---