General Description1
The CY7C194B-CY7C195B is a high-performance CMOS Asynchronous SRAM organized as 64K × 4 bits that supports an asynchronous memory interface. The device features an automatic power-down feature that significantly reduces power consumption when deselected. Output enable (OE) is supported only in CY7C195B.2
See the Truth Table in this data sheet for a complete description of read and write modes.
The CY7C194B-CY7C195B is available in 24 DIP, 24 SOJ, 28 DIP, and 28 SOJ package(s).

Features
• Fast access time: 12 ns, 15 ns, and 25 ns
• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)
• CMOS for optimum speed/power
• TTL-compatible inputs and outputs
• Available in 24 DIP, 24 SOJ, 28 DIP, and 28 SOJ