Features
• High-Voltage Types (20V Rating)
• CD4073BMS Triple 3-Input AND Gate (No longer
available or supported)
• CD4081BMS Quad 2-Input AND Gate
• CD4082BMS Dual 4-Input AND Gate (No longer
available or supported)
• Medium Speed Operation:
- tPLH, tPHL = 60ns (typ) at VDD = 10V
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1A at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Standardized Symmetrical Output Characteristics
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”

Description
CD4073BMS, CD4081BMS and CD4082BMS AND gates
provide the system designer with direct implementation of
the AND function and supplement the existing family of
CMOS gates.
The CD4073BMS, CD4081BMS and CD4082BMS are supplied
in these 14 lead outline packages:
Pinout
CD4073BMS
TOP VIEW
CD4081BMS
TOP VIEW
CD4082BMS
TOP VIEW
Braze Seal DIP *H4Q †H4H
Frit Seal DIP *H1B
Ceramic Flatpack *H3W
*CD4073B, CD4081B †CD4082B