1 Features
• Supports DisplayPort 2.1 up to 20Gbps - RBR,
HBRx, UHBRx
• Protocol agnostic linear equalizer supporting most
AC coupled interfaces up to 20Gbps
• Excellent electrical performance at 20Gbps (10
GHz Nyquist):
– 19 dB equalization
– 1.8 V DC linearity, 1.08 V AC linearity
– -15 / -16 dB Rx / Tx return loss
– -60 dB NEXT, -43 dB FEXT cross talk
– 70 fs low additive RJ with PRBS data
• Transparent to DisplayPort 1.4 and 2.1 link training
• Single 3.3 V supply with low active power: 160
mW / channel
• Internal voltage regulator provides immunity to
supply noise
• High linearity easing DP compliance ratio tests
• High channel BW resulting excellent linear EQ
curves
• Pin-strap, I2C or EEPROM programming
– 18 EQ boost settings
– 5 flat gain settings
• TDP2004: 0 to 70 °C commercial temperature
• TDP2004I: –40 to 85 °C industrial temperature
• 4 mm × 6 mm, 40 pin WQFN package
2 Applications
• Desktop PC or motherboard
• PC, notebooks, and tablets
• Docking stations
• TV, gaming, home theater, and entertainment
• Pro audio, video, and signage
• Test and measurement
• Medical
• Flat panel monitors
3 Description
The TDP2004 is a four-channel low-power highperformance
linear repeater or redriver designed to
support DisplayPort 2.1 up to 20Gbps.
The TDP2004 receivers deploy continuous time
linear equalizers (CTLE) to provide a programmable
high-frequency boost. The equalizer can open an
input eye that is completely closed due to intersymbol
interference (ISI) induced by an interconnect
medium, such as PCB traces. The CTLE receiver
is followed by a linear output driver. The linear
data-paths of TDP2004 preserve transmit preset
signal characteristics. High bandwidth, low channelto-
channel cross-talk, low additive jitter and excellent
return loss makes the device almost a passive
element in the link, but with its useful equalization.
The DisplayPort link training is effective through the
linear redriver that becomes part of the passive
channel in between source Tx and sink Rx. This
transparency in the link training protocol results in
best electrical link and lowest possible latency. The
data-path of the device uses an internally regulated
power rail that provides high immunity to any supply
noise on the board.
The device also has low AC and DC gain variation
providing consistent equalization in high volume
platform deployment.