▪ Can be configured as clock generator or jitter
attenuator/synchronizer
▪ Low power, less than 0.8W typical
▪ Low jitter, less than 50fs-RMS
▪ Compliant with ITU-T G.8262 and G.8262.1 option
1 and 2 for synchronous Ethernet Equipment Clock
(EEC/eEEC) without degrading output jitter
▪ PCIe Gen 1-6 CC, SRIS, and SRNS support
▪ Jitter attenuation with programmable loop
bandwidth from 0.1Hz to 12kHz
▪ Up to two independent frequency domains and
eight integer output dividers
▪ Each frequency domain can be slaved with DPLL
or free-run
▪ DPLL can be configured as DCO
▪ LVCMOS, AC-LVPECL, AC-LVDS, HCSL, AC-CML
output modes supported with programmable output swing
▪ Up to two single ended or one differential clock
inputs, one crystal/XO/TCXO/OCXO input
▪ Supports 1MHz I2C, 400kHz SMBus, or 50MHz SPI serial port
▪ Internal non-volatile memory (up to eight different
configurations) provides default device settings on power-up
▪ 1.8V core and output operation
▪ -40° to +85°C industrial temperature operation