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SL74HCT373 Datasheet (PDF) - System Logic Semiconductor

SL74HCT373 Datasheet PDF - System Logic Semiconductor
No. de pieza SL74HCT373
Descarga  SL74HCT373 Descarga
Tamaño del archivo   52.61 Kbytes
Page   5 Pages
Fabricante Electrónico  SLS [System Logic Semiconductor]
Página de inicio  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor
Descripción Electrónicos Octal 3-State Noninverting Transparent Latch(High-Performance Silicon-Gate CMOS)

SL74HCT373 Datasheet (PDF)

Go To PDF Page Descarga Datasheet
SL74HCT373 Datasheet PDF - System Logic Semiconductor

No. de pieza SL74HCT373
Descarga  SL74HCT373 Click to download

Tamaño del archivo   52.61 Kbytes
Page   5 Pages
Fabricante Electrónico  SLS [System Logic Semiconductor]
Página de inicio  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor
Descripción Electrónicos Octal 3-State Noninverting Transparent Latch(High-Performance Silicon-Gate CMOS)

SL74HCT373 Datasheet (HTML) - System Logic Semiconductor


SL74HCT373 Detalles de producto

Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS

The SL74HCT373 may be used as a level converter for interfacing TTL or NMOS outputs to High-Speed CMOS inputs.
The SL74HCT373 is identical in pinout to the LS/ALS373.
The eight latches of the SL74HCT373 are transparent D-type latches. While the Latch Enable is high the Q outputs follow the Data Inputs. When Latch Enable is taken low, data meeting the setup and hold times becomes latched.
The Output Enable does not affect the state of the latch, but when Output Enable is high, all outputs are forced to the high-impedance state. Thus, data may be latched even when the outputs are not enabled.

 • TTL/NMOS-Compatible Input Levels
 • Outputs Directly Interface to CMOS, NMOS, and TTL
 • Operating Voltage Range: 4.5 to 5.5 V
 • Low Input Current: 1.0 μA




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