Description
The M41ST87Y/W secure serial RTC and NVRAM supervisor is a low power 1280-bit, static CMOS SRAM organized as 160 bytes by 8 bits. A built-in 32.768 kHz oscillator (internal crystal-controlled) and 8 bytes of the SRAM (see Table 7 ) are used for the clock/calendar function and are configured in binary coded decimal (BCD) format.
An additional 11 bytes of RAM provide calibration, status/control of alarm, watchdog, tamper, and square wave functions. 8 bytes of ROM and finally 128 bytes of user RAM are also provided. Addresses and data are transferred serially via a two line, bidirectional I2C interface. The built-in address register is incremented automatically after each WRITE or READ data byte. The M41ST87Y/W has a built-in power sense circuit which detects power failures and automatically switches to the battery supply when a power failure occurs. The energy needed to sustain the SRAM and clock operations can be supplied by a small lithium button-cell supply when a power failure occurs.

Features
■ 5.0, 3.3, or 3.0 V operation
■ 400 kHz I2C bus
■ NVRAM supervisor to non-volatize external LPSRAM
■ 2.5 to 5.5 V oscillator operating voltage
■ Automatic switchover and deselect circuitry
■ Choice of power-fail deselect voltages
   – M41ST87Y:
      THS = 1: VPFD≈ 4.63 V; VCC = 4.75 to 5.5 V
      THS = 0: VPFD≈ 4.37 V; VCC = 4.5 to 5.5 V
   – M41ST87W:
      THS = 1: VPFD ≈ 2.9 V; VCC = 3.0 to 3.6 V
      THS = 0: VPFD ≈ 2.63 V; VCC = 2.7 to 3.6 V
■ Two independent power-fail comparators
   (1.25 V reference)
■ Counters for tenths/hundredths of seconds, seconds, minutes, hours, day, date, month, year, and century
■ 128 bytes of clearable, general purpose NVRAM
■ Programmable alarm and interrupt function
   (valid even during battery backup mode)
■ Programmable watchdog timer
■ Unique electronic serial number (8-byte)
■ 32 kHz frequency output available upon power on
■ Microprocessor power-on reset output
■ Battery low flag
■ Ultra-low battery supply current of 500 nA (typ)

Security features
■ Tamper indication circuits with timestamp and RAM clear
■ LPSRAM clear function (TPCLR)
■ Packaging includes a 28-lead, embedded crystal SOIC and a 20-lead SSOP
■ Oscillator stop detection