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STLC2415 Datasheet(PDF) 6 Page - STMicroelectronics

No. de pieza STLC2415
Descripción Electrónicos  BLUETOOTH BASEBAND WITH INTEGRATED FLASH
PDF  22 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STLC2415 Datasheet(HTML) 6 Page - STMicroelectronics

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Table 9. Pin List
Name
Pin #
Description
DIR
PU/PD
VDD
PAD
Clock and test pins
xin
B18
System clock
I
V1
CMOS, 3.3V TTL
compatible
schmitt trigger
nreset
A18
Reset
I
nrp
A17
External flash reset
I
V2
nwp
H3
Flash Write Protect
I
V2
CMOS 1.8V
sys_clk_req C18
System clock request
I/O
V1
CMOS, 3.3V TTL
compatible, 2mA
tristate
slew rate control
lpo_clk_p
V9
Low power oscillator + / Slow clock input
I
(1)
V2
lpo_clk_n
V10
Low power oscillator -
O
int1
C14
External Interrupt used also as external wakeup
I
(1)
V1
CMOS, 3.3V TTL
compatible
schmitt trigger
int2
C15
Second external interrupt
I
(1)
boot
T10
Select external boot from EMI or internal from ROM
I
(1)
V2
CMOS 1.8V
SPI interface
spi_frm
A2
Synchronous Serial Interface frame sync
I/O
V1
CMOS, 3.3V TTL
compatible, 2mA
tristate
slew rate control
schmitt trigger
spi_clk
A1
Synchronous Serial Interface clock
I/O
spi_txd
B1
Synchronous Serial Interface transmit data
O/t
V1
CMOS, 3.3V TTL
compatible, 2mA
slew rate control
spi_rxd
C1
Synchronous Serial Interface receive data
I
(1)
V1
CMOS, 3.3V TTL
compatible
schmitt trigger
UART interface
uart1_txd
A15
Uart1 transmit data
O/t
V1
CMOS, 3.3V TTL
compatible, 2mA
slew rate control
uart1_rxd
A16
Uart1 receive data
I
(2)
V1
CMOS, 3.3V TTL
compatible
schmitt trigger
uart2_o1
C7
Uart2 modem output
O
V1
CMOS, 3.3V TTL
compatible, 2mA
slew rate control
uart2_o2
A6
Uart2 modem output
O/t
V1
CMOS, 3.3V TTL
compatible, 2mA
slew rate control
uart2_i1
A7
Uart2 modem input
I
(2)
V1
CMOS, 3.3V TTL
compatible
uart2_i2
C8
Uart2 modem input
I
(2)
V1
uart2_io1
C6
Uart2 modem input/output
I/O
(2)
V1
CMOS, 3.3V TTL
compatible, 2mA
tristate slew rate
control
uart2_io2
C5
Uart2 modem input/output
I/O
(2)
V1



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