MP4026 – PRIMARY SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC

MP4026 Rev. 1.1

www.MonolithicPower.com

8

9/9/2015

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2015 MPS. All Rights Reserved.

PIN FUNCTIONS

Pin

Name

Description

1

VCC

Power Supply. Supplies power for the control signals and the high-current

MOSFET. Bypass to ground with an external bulk capacitor (typically 4.7µF).

2

MULT

Input Voltage Sense. Connect to the tap of resistor divider between the rectified AC

line and GND. The half-wave sinusoid provides a reference signal for the internal-

current-control loop.

The MULT pin is also used for brown-out protection detection.

3

COMP

Loop Compensation. Connect a compensation network to stabilize the LED driver

and maintain an accurate LED current.

4

GND

Ground. Current return for the control signal and the gate-drive signal.

5

CS/ZCD

Current Sense or Zero-Current Detection. When the gate driver turns on, a sensing

resistor senses the MOSFET current. The comparison between the sensed voltage

and the internal sinusoidal-current reference determines when the MOSFET turns

off. If the pin voltage exceeds the current limit (2.0V, after turn-on blanking) the gate

drive turns off.

When the gate driver turns off, the negative falling-edge (after the blanking time)

triggers the external MOSFET’s turn-on signal. Connect this pin to a resistor divider

though a diode between the auxiliary winding and GND.

Over-voltage condition is detected through ZCD. For every turn-off interval, if the

ZCD voltage exceeds the over-voltage-protection threshold after the 1.6µs

and the system stops switching until auto-restart.

CS/ZCD is also used for primary-side over-current-protection, if the sensing voltage

reaches to 2.5V after a blanking time at gate turn-on interval, the primary-side over-

current-protection triggers and the system stops switching until auto-restart.

A 10pF ceramic cap is recommended to connect from CS/ZCD to GND to bypass

the high frequency noise. In order to reduce the RC delay influence to the sample

figure 7) is suggested to be selected as small as 1kΩ.

6

GATE

Gate Drive Output. This totem-pole output stage can drive a high-power MOSFET

with a peak current of 0.8A source and 1A sink. The high-voltage limit is clamped to

14.5V to avoid excessive gate-drive voltage. The low-voltage is higher than 6.7V to

guarantee a sufficient drive capacity.