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LT8390

8390fa

For more information www.linear.com/LT8390

APPLICATIONS INFORMATION

INTVCC Regulator

An internal P-channel low dropout regulator produces

5V at the INTVCC pin from the VIN supply pin. The INTVCC

powers internal circuitry and gate drivers in the LT8390.

The INTVCC regulator can supply a peak current of 110mA

and must be bypassed to ground with a minimum of

4.7µF ceramic capacitor. Good local bypass is necessary

to supply the high transient current required by MOSFET

gate drivers.

Higher input voltage applications with large MOSFETs

being driven at higher switching frequencies may cause

the maximum junction temperature rating for the LT8390

to be exceeded. The system supply current is normally

dominated by the gate charge current. Additional external

loading of the INTVCC also needs to be taken into account

for the power dissipation calculation. The total LT8390

power dissipation in this case is VIN • IINTVCC, and overall

efficiency is lowered. The junction temperature can be

estimated by using the equation:

TJ = TA + PD • θJA

where

θJA (in °C/W) is the package thermal resistance.

To prevent maximum junction temperature from being

exceeded, the input supply current must be checked op-

erating in continuous mode at maximum VIN.

Top Gate MOSFET Driver Supply (CBST1, CBST2)

ThetopMOSFETdrivers,TG1andTG2,aredrivenbetween

their respective SW and BST pin voltages. The boost

voltages are biased from floating bootstrap capacitors

CBST1 and CBST2, which are normally re-charged through

internal bootstrap diodes D1 and D2 when the respective

top MOSFET is turned off. Both capacitors are charged

to the same voltage as the INTVCC voltage. The bootstrap

capacitors CBST1andCBST2,needtostoreabout100times

the gate charge required by the top switches A and D. In

most applications, a 0.1µF to 0.47µF, X5R or X7R dielectric

capacitor is adequate.

Figure 12. VIN Undervoltage Lockout (UVLO)

Programming VIN UVLO

A resistor divider from VINtotheEN/UVLOpinimplements

VIN undervoltage lockout (UVLO). The EN/UVLO enable

falling threshold is set at 1.220V with 13mV hysteresis. In

addition, the EN/UVLO pin sinks 2.5µA when the voltage

on the pin is below 1.220V. This current provides user

programmable hysteresis based on the value of R1. The

programmable UVLO thresholds are:

VIN(UVLO+) = 1.233V •

+R2

+2.5µA •R1

VIN(UVLO−) = 1.220V •

+R2

Figure12showstheimplementationofexternalshut-down

control while still using the UVLO function. The NMOS

grounds the EN/UVLO pin when turned on, and puts the

LT8390 in shutdown with quiescent current less than 2µA.

LT8390

VIN

RUN/STOP

CONTROL

(OPTIONAL)

8390 F12

EN/UVLO

GND

Programming Input or Output Current Limit

The input or output current limit can be programmed by

placing an appropriate value current sense resistor, RIS, in

the input or output power path. The voltage drop across

RIS is (Kelvin) sensed by the ISP and ISN pins. The CTRL

pin should be tied to a voltage higher than 1.35V to get

the full-scale 100mV (typical) threshold across the sense

resistor. The CTRL pin can be used to reduce the current

threshold to zero, although relative accuracy decreases

with the decreasing sense threshold. When the CTRL pin

voltage is between 0.3V and 1.15V, the current limit is:

IIS(MAX) =

VCTRL −0.25V

10 •RIS

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