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AM652X Datasheet(PDF) 271 Page - Texas Instruments

No. de pieza AM652X
Descripción Electrónicos  Sitara Processors
PDF  299 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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AM652X Datasheet(HTML) 271 Page - Texas Instruments

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271
AM6548, AM6528, AM6546
AM6526, AM6527
www.ti.com
SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018
Submit Documentation Feedback
Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527
Detailed Description
Copyright © 2017–2018, Texas Instruments Incorporated
MCSPI3 is connected as a master to MCU_MCSPI1 by default at power-up. MCU_MCSPI1 and
MCSPI3 may be optionally mapped to external device pads.
MCSPI4 is directly connected as a slave to MCU_MCSPI2 by default at power-up. MCSPI4 and
MCU_MCSPI2 are not pinned out externally.
The MCSPI modules include the following main features:
Serial clock with programmable frequency, polarity, and phase for each channel
Wide selection of MCSPI word lengths, ranging from 4 to 32 bits
Up to four master channels, or single channel in slave mode
Master multichannel mode:
Full duplex/half duplex
Transmit-only/receive-only/transmit-and-receive modes
Flexible input/output (I/O) port controls per channel
Programmable clock granularity
MCSPI configuration per channel. This means, clock definition, polarity enabling and word width
Single interrupt line for multiple interrupt source events
Enable the addition of a programmable start-bit for MCSPI transfer per channel (start-bit mode)
Supports start-bit write command
Supports start-bit pause and break sequence
Programmable shift operations (1-32 bits)
Programmable timing control between chip select and external clock generation
Built-in FIFO available for a single channel.
The following features are not supported on this family of devices:
Slave mode wake-up
Retention during power down
MCU_MCSPI2 and MCSPI4 are not pinned out.
For more information, see section Multichannel Serial Peripheral Interface (MCSPI) in chapter Peripherals
of the device TRM.
6.11.20 MMC/SD
There are two MMCSD modules inside the device - MMCSD0 and MMCSD1. Each MMCSD module
includes one MMCSD Host Controller.
Each controller has the following data width:
MMCSD0 - 8-bit wide data bus
MMCSD1 - 4-bit wide data bus
The MMCSD Host Controller provides an interface to eMMC 5.1 (embedded MultiMedia Card), SD 4.10
(Secure Digital), and SDIO 4.0 (Secure Digital IO) devices. The MMCSD Host Controller deals with
MMC/SD/SDIO protocol at transmission level, data packing, adding cyclic redundancy checks (CRCs),
start/end bit insertion, and checking for syntactical correctness.
Each MMCSD Host Controller supports:
eMMC5.1 Host Specification (JESD84-B51)
SD Host Controller Standard Specification 4.10
Integrated DMA controller supporting SD Advanced ADMA2 and ADMA3 (for more information about
ADMA support, see , Advanced DMA)
High Voltage eMMC – operating voltage range: 3.0 V - 3.6 V
Dual Voltage eMMC – operating voltage range: 1.70 V - 1.95 V, 3.0 V - 3.6 V



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