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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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AM652X Datasheet(PDF) 66 Page - Texas Instruments |
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AM652X Datasheet(HTML) 66 Page - Texas Instruments |
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66 / 299 page  66 AM6548, AM6528, AM6546 AM6526, AM6527 SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018 www.ti.com Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Terminal Configuration and Functions Copyright © 2017–2018, Texas Instruments Incorporated Table 4-19. DDRSS0 Signal Descriptions (continued) SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] DDR_DQS0P DDRSS Data Strobe IO D1 DDR_DQS1N DDRSS Complimentary Data Strobe IO A4 DDR_DQS1P DDRSS Data Strobe IO A5 DDR_DQS2N DDRSS Complimentary Data Strobe IO A12 DDR_DQS2P DDRSS Data Strobe IO A13 DDR_DQS3N DDRSS Complimentary Data Strobe IO A16 DDR_DQS3P DDRSS Data Strobe IO A15 DDR_ECC_D0 DDRSS ECC Data IO B19 DDR_ECC_D1 DDRSS ECC Data IO B18 DDR_ECC_D2 DDRSS ECC Data IO C18 DDR_ECC_D3 DDRSS ECC Data IO D18 DDR_ECC_D4 DDRSS ECC Data IO E18 DDR_ECC_D5 DDRSS ECC Data IO E17 DDR_ECC_D6 DDRSS ECC Data IO D17 DDR_ECC_DM DDRSS ECC Data Mask IO C17 DDR_ECC_DQSN DDRSS ECC Complimentary Data Strobe IO A18 DDR_ECC_DQSP DDRSS ECC Data Strobe IO A19 DDR_FS_RESETn DDRSS Fail-safe Reset IO F16 DDR_RESETn DDRSS Reset IO A11 DDR_VREF0 DDRSS I/O Voltage Reference (1) A F12 DDR_VREF_ZQ DDRSS I/O Voltage Reference for ZQ calibration A F15 DDR_VTP DDRSS Calibration Resistor (2) A F13 (1) This pin is intended for observation purpose only. No external voltage should be applied to this pin. (2) An external 240 Ω ±1% resistor must be connected between this pin and VSS. No external voltage should be applied to this pin. 4.3.8.2 DDRSS Mapping Table 4-20 presents DDRSS interface signal mapping per device memory type. Table 4-20. DDRSS Signal Mapping SIGNAL NAME [1] MEMORY TYPE PIN TYPE [3] BALL [4] DDR3L DDR4 LPDDR4(1) DDR_AC0 A0 A0 CA0_A IO A10 DDR_AC1 A1 A1 CA1_A IO D9 DDR_AC2 A2 A2 CA2_A IO C9 DDR_AC3 A3 A3 CA3_A IO E9 DDR_AC4 A4 A4 CA4_A IO A9 DDR_AC5 A5 A5 CA5_A IO E8 DDR_AC6 A6 A6 CA0_B IO F8 DDR_AC7 A7 A7 CA1_B IO C7 DDR_AC8 A8 A8 CA2_B IO C8 DDR_AC9 A9 A9 CA3_B IO D7 DDR_AC10 A10 A10 CA4_B IO E7 DDR_AC11 A11 A11 CA5_B IO A6 DDR_AC12 A12 A12 CS0_B IO F7 DDR_AC13 A13 A13 CKE0_B IO D6 DDR_AC14 A14 A14/WE_n CS1_B IO C6 |
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