FS9721_LP1 datasheet(21/41 Pages) FORTUNE

No. de pieza	FS9721_LP1

Descripción Electrónicos	4,000 counts auto range DMM IC

PDF	41 Pages

Scroll/Zoom	100%

Fabricante Electrónico	FORTUNE [Fortune Semiconductor Corp.]

Página de inicio	https://www.ic-fortune.com/eng/index.asp

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21 / 41 page

FS9721_LP1

Rev. 2.0

20/41

14.4 Power System

10μF

BT1

REFI

REFO

VDDA

VGG

VDD

AGND

VSS

FS9721_LP1

R10

40k

20k

200k

82k

VR2

10k

RLCD

C16

0.1μF

Diagram 8

Power Circuit

2*VDD

3.9V

1.2V

0.4V

1.5V

VGG

VDDA

REFO

REFI

VDD

AGND

VSS

FS9721_LP1

RLCD

Diagram 9

Relative Voltage of Each Point

VB is the bias current input point in IC. The increase of R3 will reduce the current consumption in

IC, but the shortage of bias current will affect the input range of AC measurement.

AGND is the analog ground connection. Its value is equal to the middle point of battery voltage.

The point value is generated in the IC and cannot connect to the middle point of battery.

C7 and C8 are bypath capacitance, and also to make AGND regulated to VDD and VSS. C3 is

power pump capacitance. IC makes VDD voltage pass C3 to charge/discharge to rise VGG being

about double voltage of VDD.

VDDA is the output voltage after the regulation of VGG in the IC. It is about 3.9V that relative to

VSS.

REFO is the bandgap power source in the IC. It is about 1.2V that relative to AGND and has

100ppm/

stability.

℃

FS9721_LP1 Datasheet(PDF) 21 Page - Fortune Semiconductor Corp.

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