NUC505-YO2T datasheet(72/130 Pages) NUVOTON

No. de pieza	NUC505-YO2T

Descripción Electrónicos	ARM짰 Cortex짰-M4 32-bit Microcontroller

PDF	130 Pages

Scroll/Zoom	100%

Fabricante Electrónico	NUVOTON [Nuvoton Technology Corporation]

Página de inicio	http://www.nuvoton.com

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72 / 130 page

NUC505

July. 26, 2018

Page 72 of 130

Rev.1.08

System Manager

6.2

6.2.1

Overview

The following functions are included in system manager section

 System reset

 System memory map

 Bus arbitration algorithm

 Global control registers

 System Timer (Systick)

 Nested Vectored Interrupt Control (NVIC)

 System control register map and description

6.2.2

System Reset

 Hardware Reset

─

Power-on Reset (POR)

─

Low level on the nRESET Pin (nRST)

─

Watchdog time-out reset (WDT)

─

Low voltage reset (LVR)

 Software Reset

─

SYSRESETREQ (AIRCR[2])

─

CPU Reset (SYS_IPRST0[0])

─

CHIPRST (SYS_IPRST0 [1])

Note1: SYSRESETREQ (AIRCR[2]) reset the whole chip including all peripherals, but does not reset

SPIM function, vector map module parameter setting, and PA.8~PA.15 multi-function setting.

Note2: CPU Rest (SYS_IPRST0[0]) only resets the CPU function.

Note3: CHIPRST (SYS_IPRST0[1]) reset the whole chip including all peripherals.

NUC505-YO2T Datasheet(PDF) 72 Page - Nuvoton Technology Corporation