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WM8802SCFTV Datasheet(PDF) 34 Page - Wolfson Microelectronics plc |
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WM8802SCFTV Datasheet(HTML) 34 Page - Wolfson Microelectronics plc |
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34 / 65 page ![]() WM8802 Product Preview w PP Rev 1.1 April 2004 34 LEFT CHANNEL RIGHT CHANNEL TLRCK (I) TBCK (I) TDATA (I) 1/fs n 3 2 1 n-2 n-1 LSB MSB n 3 2 1 n-2 n-1 LSB MSB 16 to 24 bits 16 to 24 bits Figure 26 Data Input Timing – Left Justified Data Input VALIDITY FLAG INPUT (VI) Validity flags can be input from RX5/VI by switching the RX5/VI input contents with VISEL. The validity flag write timing is shown below. The validity flag can be written with the micro-controller interface but port settings have priority. Writing validity flags with the micro-controller interface is done using VMODE. RX5/VI OUTPUT CONDITIONS 0 No error 1 Error Table 15 RX5/V1 Input V-L2 V-R2 V-L3 V-R1 V-L1 L1 L2 L3 R2 R1 TLRCK TBCK VI Internal latch signal Figure 27 Validity Flag Input Timing |
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