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T83C51SND1-ROTIL Datasheet(PDF) 10 Page - ATMEL Corporation |
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T83C51SND1-ROTIL Datasheet(HTML) 10 Page - ATMEL Corporation |
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10 / 60 page ![]() 10 T8xC51SND1 Rev. D – 15-Nov-01 4.3 Internal Pin Structure Table 15. Detailed Internal Pin Structure Notes: 1. For information on resistors value, input/output levels, and drive capability, refer to the Section “DC Characteristics”, page 34. 2. When the 2-wire controller is enabled, P 1, P2, and P3 transistors are disabled allowing pseudo open-drain structure. 3. In Port 2, P1 transistor is continuously driven when outputting a high level bit address (A15:8). Circuit 1 Type Pins Input TST# Input/Output RST Input/Output P1 2 P2 3 P3 P4 P53:0 Input/Output P0 MCMD MDAT ISP# Output ALE SCLK DCLK DOUT DSEL MCLK Input/Output D+ D- VDD VSS P VDD Watchdog Output P 3 VSS N P 1 VDD VDD 2 osc Latch Output periods P 2 VDD VSS N P VDD VSS N P VDD D+ D- |
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