STR720 datasheet(314/401 Pages) STMICROELECTRONICS

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STR720 - EXTENDED FUNCTION TIMER (EFT)

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21.3.3.1 Procedure

To use the input capture function select the following in the CR1 and CR2 registers:

– Select the timer clock source (ECKEN).

– Select the timer clock division factor (CC7

÷CC0) if internal clock is used.

– Select the edge of the active transition on the ICAPA pin with the IEDGA bit, if ICAPA is ac-

tive.

– Select the edge of the active transition on the ICAPB pin with the IEDGB bit, if ICAPB is ac-

tive.

– Set ICAIE (or ICBIE) when ICAPA (or ICAPB) is active, to generate an interrupt after an input

capture.

When an input capture occurs:

– ICFi bit is set.

– The ICiR register contains the value of the counter on the active transition on the ICAPi pin

(see Figure 48).

– A timer interrupt is generated if ICAIE is set (if only ICAPA is active) or ICBIE is set (if only

ICAPB is active); otherwise, the interrupt remains pending until concerned enable bits are

set.

Clearing the Input Capture interrupt request is done by:

1. A write access to the SR register while the ICFi bit is cleared, 15-bit at ‘0’ for ICAPA and

12-bit at ‘0’ for ICAPB.

Figure 47. Input Capture Block Diagram

ECKEN

16-BIT COUNTER

(Control Register 1) CR1 low byte

ICFB

ICFA

(Status Register) SR high byte

IEDG2

ICAPA

ICAPB

EDGE DETECT

CIRCUIT B

16-BIT

ICAR

ICBR

EDGE DETECT

CIRCUIT A

CC7-CC0

from CR2

IEDG1

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