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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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STR720 Datasheet(PDF) 359 Page - STMicroelectronics |
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STR720 Datasheet(HTML) 359 Page - STMicroelectronics |
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359 / 401 page  STR720 - MISCELLANEA REGISTERS (GCR - CGC - AHB_ERR) 359/401 CGC Emulation register 2 (CGC-EMU2) Address: 0xF000_2C14 Reset value: 0x001F This register configures the status of clock gating for each of the peripheral kernel requiring a dedicated clock, while the application program execution is stopped due to a debug request. Each peripheral can be configured to stop working as the user code reaches a breakpoint. Bits 15:3 = Reserved. These bits must be always written to 0. Bits 2:1 = DxEM: Dedicated peripheral x clock during EMulation 0: Peripheral x dedicated clock is gated off at a debug request, regardless from the state of the corresponding DxCO bit. 1: Peripheral x dedicated clock gating status is unaffected by debug requests, and it is always determined by its corresponding DxCO bit. Bit 0 = Reserved. This bit must be always written to 0. The following table lists the correspondence between each controllable peripheral and the CGC-EMU2 register bits along with their reset value.. 15 14 13 12 11 10 9 8 765432 1 0 Reserved D2EM D1EM Res. -rw rw - Table 79. CGC-EMU2 bit assignment CGC-EMU2 Bit Affected peripheral Reset status D1EM ATAPI-Kernel Not affected by debug requests. D2EM USB-Kernel Not affected by debug requests. |
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